EPM7064SLC44-10N

Programmable Logic Device, PLCC84, high-density, high-performance, 5.0V, 175.4 MHz

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Price:: US $4.00~4.16 / piece [Get Latest Price]

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	US $4.00~4.16

PartNumber:: EPM7064SLC44-10N

Brand:: Altera Corporation - ALTR | Pack: PLCC | D/C: 08+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-11-28

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Part Number:EPM7064SLC44-10N
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Product Summary

The EPM7064SLC44-10N is a high-density, high-performance PLD. It is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based EPM7064SLC44-10N provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz.

Parametrics

EPM7064SLC44-10N absolute maximum ratings: (1)Supply voltage:–2.0V to 7.0V; (2)DC input voltage:–2.0V to 7.0V; (3)DC output current, per pin:–25mA to 25mA; (4)Storage temperature:–65℃ to 150℃; (5)Ambient temperature:–65℃ to 135℃; (6)Junction temperature:Ceramic packages, under bias:150℃, PQFP and RQFP packages, under bias:135℃.

Features

EPM7064SLC44-10N features: (1)High-performance, EEPROM-based programmable logic devices(PLDs) based on second-generation MAX architecture; (2)5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices:ISP circuitry compatible with IEEE Std. 1532; (3)Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices; (4)Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells; (5)Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates; (6)5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect); (7)PCI-compliant devices available.