TMS320C31PQL60

digital signal processor, 33-ns Instruction Cycle Time, 32-Bit High-Performance CPU, QFP

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Price:: US $2.70~2.80 / piece [Get Latest Price]

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	US $2.70~2.80

PartNumber:: TMS320C31PQL60

Brand:: Texas Instruments - TI | Pack: QFP | D/C: 05+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-11-28

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Part Number:TMS320C31PQL60
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Product Summary

The TMS320C31PQL60 is a 32-bit, floating-point processor manufactured in 0.6μm triple-level-metal CMOS technology. The TMS320C31PQL60 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. The TMS320C31PQL60 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

Parametrics

TMS320C31PQL60 absolute maximum ratings: (1)Supply voltage range:–0.3 V to 7 V; (2)Input voltage range:–0.3 V to 7 V; (3)Output voltage range:–0.3 V to 7 V; (4)Operating case temperature range: TC PQL (commercial):0℃ to 85℃, PQA (industrial):-40℃ to 125℃; (5)Storage temperature range:-55℃ to 150℃.

Features

TMS320C31PQL60 features: (1)32-Bit High-Performance CPU; (2)16- /32-Bit Integer and 32- /40-Bit Floating-Point Operations; (3)32-Bit Instruction Word, 24-Bit Addresses; (4)Two 1K × 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks; (5)Boot-Program Loader; (6)Fabricated Using 0.6 μm Enhanced Performance Implanted CMOS (EPIC) Technology by Texas Instruments (TI); (7)132-Pin Plastic Quad Flat Package(PQ Suffix); (8)Eight Extended-Precision Registers; (9)Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs); (10)Two Low-Power Modes; (11)Two- and Three-Operand Instructions; (12)Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle; (13)Block-Repeat Capability; (14)Zero-Overhead Loops With Single-Cycle Branches; (15)Conditional Calls and Returns; (16)Interlocked Instructions for Multiprocessing Support; (17)Bus-Control Registers Configure Strobe-Control Wait-State Generation.